Generally, an insulated-gate bipolar transistor may have the characteristics of both the insulated gate structure of a metal oxide semiconductor (MOS), transistor and the high current density of a bipolar transistor. Such an insulated-gate bipolar transistor has been spotlighted as an alternative device which can overcome the problems of a complicated current control circuit and low switching speed of a bipolar transistor and a poor current control capability of a MOS transistor.
The insulated-gate bipolar transistor is taking over the field of power bipolar transistors and power MOS transistors because of the advantages, of a low forward voltage drop characteristic and a fast switching operation by gate driving.
FIG. 1 is a cross-sectional view illustrating the structure of an insulated-gate bipolar transistor in accordance with the related art.
As illustrated in FIG. 1, the insulated-gate bipolar transistor may include an N-type drift region 13 formed in a semiconductor substrate 11, a P-type base region 15 formed in a predetermined surface area of the N-type drift region 13, highly doped N-type emitter ion implantation regions 17 formed in a predetermined surface area of the P-type base region 15, and a P-type ion implantation region 19 formed between and adjacent to the N-type emitter ion plantation regions 17. Further, the insulated-gate bipolar transistor may include an N-type buffer layer 21 formed in a predetermined surface area of the N-type drift region 13 so as to be spaced apart from the P-type base region 15 by a preset distance, and a P-type collector ion implantation region 23 formed in a predetermined surface area of the N-type buffer layer 21.
A gate insulation film (not shown) may be interposed between the P-type base regions 15 adjacent with each other on and/or over the surface of the semiconductor substrate 11 to form a gate electrode 25. An insulation layer 27 defining an emitter region and a collector region may be formed on and/or over the semiconductor substrate 11 where the gate electrode 25 is formed, an emitter electrode 29 may be formed in the emitter region to be connected to the N-type emitter ion implantation region 17, and a collector electrode 31 may be formed in the collector region to be connected to the P-type collector ion implantation region 23.
However, such an insulated-gate bipolar transistor has several problems to be mitigated and/or solved, such as a forward voltage drop caused by a region of a junction field effect transistor, a turn-off time delay caused by hole current at the time of turn-off, and the like.